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  ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation fsq0565r, fsq0765r rev. 1.0.1 june 2008 fsq0565r, fsq0765r green-mode fairchild power switch (fps?) for quasi-resonant operation - low emi and high efficiency features ? optimized for quasi-resonant converter (qrc) ? low emi through variable frequency control and avs (alternating valley switching) ? high-efficiency through minimum voltage switching ? narrow frequency variation range over wide load and input voltage variation ? advanced burst-mode operation for low standby power consumption ? simple scheme for sync voltage detection ? pulse-by-pulse current limit ? various protection functions: overload protection (olp), over-voltage protection (ovp), abnormal over-current protection (aocp), internal thermal shutdown (tsd) with hysteresis, output short protection (osp) ? under-voltage lockout (uvlo) with hysteresis ? internal start-up circuit ? internal high-voltage sense fet (650v) ? built-in soft-start (17.5ms) applications ? power supply for lcd tv and monitor, vcr, svr, stb, and dvd & dvd recorder ? adapter related resourses visit: http://www.fairchildsemi.com/apnotes/ for: ? an-4134: design guidelines for offline forward converters using fairchild power switch (fps ? ) ? an-4137: design guidelines for offline flyback converters using fairchild power switch (fps ? ) ? an-4140: transformer design consideration for offline flyback converters using fairchild power switch (fps ? ) ? an-4141: troubleshooting and design tips for fairchild power switch (fps ? ) flyback applications ? an-4145: electromagnetic compatibility for power converters ? an-4147: design guidelines for rcd snubber of flyback ? an-4148: audible noise reduction techniques for fairchild power switch fairchild power switch(fps ?) applications ? an-4150: design guidelines for flyback converters using fsq-series fairchild power switch (fps ? ) description a quasi-resonant converter (qrc) generally shows lower emi and higher power conversion efficiency than a conventional hard-switched converter with a fixed switching frequency. the fsq-series is an integrated pulse-width modulation (pwm) controller and sensefet specifically designed for quasi-resonant operation and alternating valley switching (avs). the pwm controller includes an integrated fixed-frequency oscillator, under-voltage lockout (uvlo), leading- edge blanking (leb), optimized gate driver, internal soft- start, temperature-compensated precise current sources for a loop compensation, and self-protection circuitry. compared with a discrete mosfet and pwm controller solution, the fsq-series can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. this device provides a basic platform for cost-effective designs of quasi-resonant switching flyback converters.
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 2 ordering information notes: 1. the junction temperature can limit the maximum output power. 2. 230v ac or 100/115v ac with doubler. 3. typical continuous power in a non-ventilated enclosed adapter measured at 50c ambient temperature. 4. maximum practical continuous power in an open-frame design at 50c ambient. 5. these parts are rohs compliant. product number pkg. (5) operating temp. current limit r ds(on) max. maximum output power (1) replaces devices 230v ac 15% (2) 85-265v ac adapter (3) open frame (4) adapter (3) open frame (4) fsq0565r to-220f-6l -40 to +85c 3.0a 2.2 70w 80w 41w 60w fscm0565r fsdm0565rb fsq0765r to-220f-6l -40 to +85c 3.5a 1.6 80w 90w 48w 70w fscm0765r fsdm0765rb
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 3 application diagram figure 1. typical flyback application internal block diagram figure 2. internal block diagram v cc gnd drain sync v o pwm fb ac in v str fsq0765r rev.00 8v/12v v ref s q r v cc v ref i delay i fb v sd v ovp v ocp s q q r r 3r v cc good v cc drain fb gnd aocp gate driver v cc good leb 250ns pwm v burst 5 sync (1.1v) soft- start 0.35/0.55 osc v str tsd 4 3 1 6 fsq0765r rev.00 2 avs q v osp lpf lpf t on < t osp after ss
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 4 pin configuration figure 3. pin configuration (top view) pin definitions pin # name description 1drain sensefet drain. high-voltage power sensefet drain connection. 2gnd ground. this pin is the control ground and the sensefet source. 3v cc power supply. this pin is the positive supply input. this pin provides internal operating cur- rent for both start-up and steady-state operation. 4fb feedback. this pin is internally connected to the inverting input of the pwm comparator. the collector of an opto-coupler is typically tied to this pin. for stable operation, a capacitor should be placed between this pin and gnd. if the voltage of this pin reaches 6v, the overload pro- tection triggers, which shuts down the fps. 5sync sync. this pin is internally connected to the sync-detect comparator for quasi-resonant switch- ing. in normal quasi-resonant operation, the threshold of the sync comparator is 1.2v/1.0v. 6v str start-up. this pin is connected directly, or through a resistor, to the high-voltage dc link. at start-up, the internal high-voltage current source supplies internal bias and charges the exter- nal capacitor connected to the v cc pin. once v cc reaches 12v, the internal current source is disabled. it is not recommended to connect v str and drain together. 6. v str 5. sync 4. fb 3. v cc 2. gnd 1. drain fsq0765r rev.00
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 5 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. t a = 25c, unless otherwise specified. notes: 6. repetitive rating: pulse width limited by maximum junction temperature. 7. l=14mh, starting t j =25c. thermal impedance t a = 25c unless otherwise specified. notes: 8. free standing with no heat-sink under natural convection. 9. infinite cooling condition - refer to the semi g30-88. symbol parameter min. max. unit v str v str pin voltage 500 v v ds drain pin voltage 650 v v cc supply voltage 20 v v fb feedback voltage range -0.3 13 v v sync sync pin voltage -0.3 13 v i dm drain current pulsed fsq0565r 11 a fsq0765r 14.4 a i d continuous drain current (6) fsq0565r t c = 25c 2.8 a t c = 100c 1.7 fsq0765r t c = 25c 3.6 a t c = 100c 2.28 e as single pulsed avalanche energy (7) fsq0565r 190 mj fsq0765r 570 mj p d total power dissipation(tc=25 o c) 45 w t j operating junction temperature -40 internally limited c t a operating ambient temperature -40 +85 c t stg storage temperature -55 +150 c esd electrostatic discharge capability, human body model 2.0 kv electrostatic discharge capability, charged device model 2.0 kv symbol parameter package value unit ja junction-to-ambient thermal resistance (8) to-220f-6l 50 c/w jc junction-to-case thermal resistance (9) 2.8 c/w
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 6 electrical characteristics t a = 25 c unless otherwise specified. continued on the following page... symbol parameter condition min. typ. max. unit sensefet section bv dss drain source breakdown voltage v cc = 0v, i d = 100a 650 v i dss zero-gate-voltage drain current v ds = 560v 300 a r ds(on) drain-source on-state resistance fsq0565r t j = 25c, i d = 0.5a 1.76 2.20 fsq0765r t j = 25c, i d = 0.5a 1.3 1.6 c oss output capacitance fsq0565r v gs = 0v, v ds = 25v, f = 1mhz 78 pf fsq0765r 125 t d(on) turn-on delay time fsq0565r v dd = 350v, i d = 25ma 22 ns fsq0765r 22 t r rise time fsq0565r v dd = 350v, i d = 25ma 52 ns fsq0765r 70 t d(off) turn-off delay time fsq0565r v dd = 350v, i d = 25ma 95 ns fsq0765r 105 t f fall time fsq0565r v dd = 350v, i d = 25ma 50 ns fsq0765r 65 control section t on.max maximum on time t j = 25c 8.8 10.0 11.2 s t b blanking time t j = 25c, v sync = 5v 13.5 15.0 16.5 s t w detection time window t j = 25c, v sync = 0v 6.0 s f s initial switching frequency 59.6 66.7 75.8 khz f s switching frequency variation (11) -25c < t j < 85c 5 10 % t avs avs triggering threshold (9) on time at v in = 240v dc , lm = 360 h (avs triggered when v avs >spec & t avs fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 7 electrical characteristics (continued) t a = 25 c unless otherwise specified. notes: 10. propagation delay in the control ic. 11. guaranteed by design, but not tested in production. 12. includes gate turn-on time. symbol parameter condition min. typ. max. unit protection section i limit peak current limit fsq0565r t j = 25c, di/dt = 370ma/s 2.64 3.00 3.36 a fsq0765r t j = 25c, di/dt = 460ma/s 3.08 3.50 3.92 v sd shutdown feedback voltage v cc = 15v 5.5 6.0 6.5 v i delay shutdown delay current v fb = 5v 4 5 6 a t leb leading-edge blanking time (11) 250 ns t osp output short protection (9) threshold time t j = 25c osp triggered when t on v osp & lasts longer than t osp_fb 1.2 1.4 s v osp threshold feedback voltage 1.8 2.0 v t osp_fb feedback blanking time 2 2.5 3.0 s t sd thermal shutdown (9) shutdown temperature 125 140 155 c hys hysteresis 60 sync section v sh1 sync threshold voltage 1 v cc = 15v, v fb = 2v 1.0 1.2 1.4 v v sl1 0.8 1.0 1.2 t sync sync delay time (11)(12) 230 ns v sh2 sync threshold voltage 2 v cc = 15v, v fb = 2v 4.3 4.7 5.1 v v sl2 4.0 4.4 4.8 v clamp low clamp voltage i sync_max = 800a i sync_min = 50a 0.0 0.4 0.8 v v ovp over-voltage protection threshold voltage v cc = 15v, v fb = 2v 7.489.6v t ovp blanking time (11) 1.0 1.7 2.4 s total device section i op operating supply current (control part only) v cc = 13v 1 3 5 ma i start start current v cc = 10v (before v cc reaches v start ) 350 450 550 a i ch start-up charging current v cc = 0v, v str = mininmum 50v 0.65 0.85 1.00 ma v str minimum v str supply voltage 26 v
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 8 comparison between fsdm0x65rnb and fsq-series function fsdm0x65re fsq-series fsq-series advantages operation method constant frequency pwm quasi-resonant operation ? improved efficiency by valley switching ? reduced emi noise ? reduced components to detect valley point emi reduction frequency modulation reduce emi noise ? valley switching ? inherent frequency modulation ? alternate valley switching hybrid control ccm or avs based on load and input condition ? improves efficiency by introducing hybrid control burst-mode operation burst-mode operation advanced burst-mode operation ? improved standby power by avs in burst-mode strong protections olp, ovp olp, ovp, aocp, osp ? improved reliability through precise aocp ? improved reliability through precise osp tsd 145 c without hysteresis 140c with 60c hysteresis ? stable and reliable tsd operation ? converter temperature range
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 9 typical performance characteristics these characteristic graphs are normalized at t a = 25c. figure 4. operating supply current (i op ) vs. t a figure 5. uvlo start threshold voltage (v start ) vs. t a figure 6. uvlo stop threshold voltage (v stop ) vs. t a figure 7. start-up charging current (i ch ) vs. t a figure 8. initial switching frequency (f s ) vs. t a figure 9. maximum on time (t on.max ) vs. t a -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c]
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 10 typical performance characteristics (continued) these characteristic graphs are normalized at t a = 25c. figure 10. blanking time (t b ) vs. t a figure 11. feedback source current (i fb ) vs. t a figure 12. shutdown delay current (i delay ) vs. t a figure 13. burst-mode high threshold voltage (v burh ) vs. t a figure 14. burst-mode low threshold voltage (v burl ) vs. t a figure 15. peak current limit (i lim ) vs. t a -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c]
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 11 typical performance characteristics (continued) these characteristic graphs are normalized at t a = 25c. figure 16. sync high threshold voltage 1 (v sh1 ) vs. t a figure 17. sync low threshold voltage 1 (v sl1 ) vs. t a figure 18. shutdown feedback voltage (v sd ) vs. t a figure 19. over-voltage protection (v ov ) vs. t a figure 20. sync high threshold voltage 2 (v sh2 ) vs. t a figure 21. sync low threshold voltage 2 (v sl2 ) vs. t a -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -40-200 20406080100120 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c]
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 12 functional description 1. start-up: at start-up, an internal high-voltage current source supplies the internal bias and charges the external capacitor (c a ) connected to the v cc pin, as illustrated in figure 22. when v cc reaches 12v, the fps? begins switching and the internal high-voltage current source is disabled. the fps continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless v cc goes below the stop voltage of 8v. figure 22. start-up circuit 2. feedback control: fps employs current-mode control, as shown in figure 23. an opto-coupler (such as the fod817a) and shunt regulator (such as the ka431) are typically used to implement the feedback network. comparing the feedback voltage with the voltage across the r sense resistor makes it possible to control the switching duty cycle. when the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5v, the opto-coupler led current increases, pulling down the feedback voltage and reducing the duty cycle. this typically happens when the input voltage is increased or the output load is decreased. 2.1 pulse-by-pulse current limit: because current- mode control is employed, the peak current through the sensefet is limited by the inverting input of pwm comparator (v fb *), as shown in figure 23. assuming that the 0.9ma current source flows only through the internal resistor (3r + r = 2.8k), the cathode voltage of diode d2 is about 2.5v. since d1 is blocked when the feedback voltage (v fb ) exceeds 2.5v, the maximum voltage of the cathode of d2 is clamped at this voltage, clamping v fb *. therefore, the peak value of the current through the sensefet is limited. 2.2 leading-edge blanking (leb): at the instant the internal sensefet is turned on, a high-current spike usually occurs through the sensefet, caused by primary-side capacitance and secondary-side rectifier reverse recovery. excessive voltage across the r sense resistor would lead to incorrect feedback operation in the current-mode pwm control. to counter this effect, the fps employs a leading-edge blanking (leb) circuit. this circuit inhibits the pwm comparator for a short time (t leb ) after the sensefet is turned on. figure 23. pulse-width-modulation (pwm) circuit 3. synchronization: the fsq-series employs a quasi- resonant switching technique to minimize the switching noise and loss. the basic waveforms of the quasi- resonant converter are shown in figure 24. to minimize the mosfet's switching loss, the mosfet should be turned on when the drain voltage reaches its minimum value, which is indirectly detected by monitoring the v cc winding voltage, as shown in figure 24. figure 24. quasi-resonant switching waveforms 8v/12v v ref internal bias v cc v str i ch v cc good v dc c a fsq0765r rev.00 3 6 4 osc v cc v ref i delay i fb v sd r 3r gate driver olp d1 d2 + v fb * - v fb ka431 c b v o fod817a r sense sensefet fsq0765r rev. 00 v dc v ro v ro v ds t f 1.2v v sync 230ns delay 1.0v on on v ovp (8v) fsq0765r rev.00 mosfet gate
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 13 the switching frequency is the combination of blank time (t b ) and detection time window (t w ). in case of a heavy load, the sync voltage remains flat after t b and waits for valley detection during t w . this leads to a low switching frequency not suitable for heavy loads. to correct this drawback, additional timing is used. the timing conditions are described in figures 25, 26, and 27. when the v sync remains flat higher than 4.4v at the end of t b that is t x , the next switching cycle starts after internal delay time from t x . in the second case, the next switching occurs on the valley when the v sync goes below 4.4v within t b . once v sync detects the first valley within t b , the other switching cycle follows classical qrc operation. figure 25. v sync > 4.4v at t x figure 26. v sync < 4.4v at t x figure 27. after v sync finds first valley 4. protection circuits: the fsq-series has several self-protective functions, such as overload protection (olp), abnormal over-current protection (aocp), over-voltage protection (ovp), and thermal shutdown (tsd). all the protections are implemented as auto- restart mode. once the fault condition is detected, switching is terminated and the sensefet remains off. this causes v cc to fall. when v cc falls down to the under-voltage lockout (uvlo) stop voltage of 8v, the protection is reset and the start-up circuit charges the v cc capacitor. when the v cc reaches the start voltage of 12v, normal operation resumes. if the fault condition is not removed, the sensefet remains off and v cc drops to stop voltage again. in this manner, the auto-restart can alternately enable and disable the switching of the power sensefet until the fault condition is eliminated. because these protection circuits are fully integrated into the ic without external components, the reliability is improved without increasing cost. figure 28. auto restart protection waveforms t b =15 s i ds v ds v sync internal delay i ds 4.4v 1.2v 1.0v t x fsq0765r rev. 00 t b =15 s i ds v ds v sync internal delay i ds 4.4v 1.2v 1.0v t x fsq0765r rev. 00 t b =15 s i ds i ds v ds v sync internal delay 4.4v 1.2v 1.0v ingnore t x fsq0765r rev. 00 fault situation 8v 12v v cc v ds t fault occurs fault removed normal operation normal operation power on fsq0765r rev. 00
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 14 4.1 overload protection (olp): overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. in this situation, the protection circuit should trigger to protect the smps. however, even when the smps is in the normal operation, the overload protection circuit can be triggered during the load transition. to avoid this undesired operation, the overload protection circuit is designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. because of the pulse-by-pulse current limit capability, the maximum peak current through the sensefet is limited, and therefore the maximum input power is restricted with a given input voltage. if the output consumes more than this maximum power, the output voltage (v o ) decreases below the set voltage. this reduces the current through the opto- coupler led, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (v fb ). if v fb exceeds 2.5v, d1 is blocked and the 5a current source starts to charge cb slowly up to v cc . in this condition, v fb continues increasing until it reaches 6v, when the switching operation is terminated, as shown in figure 29. the delay time for shutdown is the time required to charge c fb from 2.5v to 6v with 5a. a 20 ~ 50ms delay time is typical for most applications. figure 29. overload protection 4.2 abnormal over-current protection (aocp): when the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the sensefet during the leb time. even though the fsq-series has overload protection, it is not enough to protect the fsq-series in that abnormal case, since severe current stress is imposed on the sensefet until olp triggers. the fsq-series has an internal aocp circuit shown in figure 30. when the gate turn-on signal is applied to the power sensefet, the aocp block is enabled and monitors the current through the sensing resistor. the voltage across the resistor is compared with a preset aocp level. if the sensing resistor voltage is greater than the aocp level, the set signal is applied to the latch, resulting in the shutdown of the smps. figure 30. abnormal over-current protection 4.3 output-short protection (osp): if the output is shorted, steep current with extremely high di/dt can flow through the sensefet during the leb time. such a steep current brings high voltage stress on drain of sensefet when turned off. to protect the device from such an abnormal condition, osp is included in the fsq- series. it is comprised of detecting v fb and sensefet turn-on time. when the v fb is higher than 2v and the sensefet turn-on time is lower than 1.2s, the fps recognizes this condition as an abnormal error and shuts down pwm switching until v cc reaches v start again. an abnormal condition output short is shown in figure 31. figure 31. output short waveforms 4.4 over-voltage protection (ovp): if the secondary- side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. then, v fb climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the smps until the overload protection triggers. because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the overload protection triggers, resulting in the breakdown of the devices in the secondary side. to prevent this situation, an ovp circuit is employed. in general, the peak voltage of the sync signal is proportional to the output voltage and the fsq-series v fb t 2.5v 6.0v overload protection t 12 = c fb *(6.0-2.5)/i delay t 1 t 2 fsq0765r rev.00 2 s q q r osc r 3r gnd gate driver leb 250ns pwm + - v ocp aocp r sense fsq0765r rev.00 d mosfet drain current rectifier diode current v fb v o 0 0 output short occurs 1.2us i o 0 i lim turn-off delay minimum turn-on time fsq0765r rev. 00
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 15 uses a sync signal instead of directly monitoring the output voltage. if the sync signal exceeds 8v, an ovp is triggered, shutting down the smps. to avoid undesired triggering of ovp during normal operation, there are 2 points to be considered which is depicted in figure 32. one is the making the peak voltage of the sync signal should be designed below 6v and the other is that be sure to make the spike of sync pin as los as possible not to get longer than t ovp by decreasing the leakage inductance shown at v cc winding coil. figure 32. ovp triggering 4.5 thermal shutdown with hysteresis (tsd): the sensefet and the control ic are built in one package. this makes it easy for the control ic to detect the abnormally high temperature of the sensefet. if the temperature exceeds approximately 140c, the thermal shutdown triggers ic shutdown. the ic recovers its operation when the junction temperature decreases 60c from tsd temperature and v cc reaches start-up voltage (v start ). 5. soft-start: the fps has an internal soft-start circuit that increases pwm comparator inverting input voltage with the sensefet current slowly after it starts up. the typical soft-start time is 17.5ms. the pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. the voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. this mode helps prevent transformer saturation and reduces stress on the secondary diode during start-up. 6. burst operation: to minimize power dissipation in standby mode, the fps enters burst-mode operation. as the load decreases, the feedback voltage decreases. as shown in figure 33, the device automatically enters burst-mode when the feedback voltage drops below v burl (350mv). at this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. this causes the feedback voltage to rise. once it passes v burh (550mv), switching resumes. the feedback voltage then falls and the process repeats. burst-mode operation alternately enables and disables switching of the power sensefet, thereby reducing switching loss in standby mode. figure 33. waveforms of burst operation 7. switching frequency limit: to minimize switching loss and electromagnetic interference (emi), the mosfet turns on when the drain voltage reaches its minimum value in quasi-resonant operation. however, this causes switching frequency to increases at light load conditions. as the load decreases or input voltage increases, the peak drain current diminishes and the switching frequency increases. this results in severe switching losses at light-load condition, as well as intermittent switching and audible noise. these problems create limitations for the quasi-resonant converter topology in a wide range of applications. to overcome these problems, fsq-series employs a frequency-limit function, as shown in figures 34 and 35. once the sensefet is turned on, the next turn-on is prohibited during the blanking time (t b ). after the blanking time, the controller finds the valley within the detection time window (t w ) and turns on the mosfet, as shown in figures 34 and figure 35 (cases a, b, and c). v vcc_coil & v cc v sync v ovp (8v) v cc v vcc_coil v clamp v sh2 (4.8v) v dc n pri n vcc absolue max v cc (20v) t ovp t ovp improper ovp triggering fsq0765r rev.00 v fb v ds 0.35v 0.55v i ds v o v o set time switching disabled t1 t2 t3 switching disabled t4 fsq0765r rev.00
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 16 if no valley is found during t w , the internal sensefet is forced to turn on at the end of t w (case d). therefore, the devices have a minimum switching frequency of 48khz and a maximum switching frequency of 67khz. figure 34. qrc operation with limited frequency 8. avs (alternating valley switching): due to the quasi-resonant operation with limited frequency, the switching frequency varies depending on input voltage, load transition, and so on. at high input voltage, the switching on time is relatively small compared to low input voltage. the input voltage variance is small and the switching frequency modulation width becomes small. to improve the emi performance, avs is enabled when input voltage is high and the switching on time is small. internally, quasi-resonant operation is divided into two categories; one is first valley switching and the other is second-valley switching after blanking time. in avs, two successive occurrences of first-valley switching and the other two successive occurrences of second-valley switching is alternatively selected to maximize frequency modulation. as depicted in figure 35, the switching frequency hops when the input voltage is high. the internal timing diagram of avs is described in figure 36. figure 35. switching frequency range figure 36. alternating valley switching (avs) t s max =21 s t s max =21 s t b =15 s t s t b =15 s t s t s i ds i ds i ds i ds i ds i ds i ds i ds a b c d t w =6 s t b =15 s t b =15 s fsq0765r rev. 00 53khz 67khz 59khz constant frequency v in assume the resonant period is 2 s f s s 21 1 s 15 1 s 17 1 avs trigger point 48khz s 19 1 avs region ccm dcm variable frequency within limited range db ca fsq0765 r rev.00 1st or 2nd is dependent on gatex2 2nd valley switching 1st valley switching v gate gatex2 gatex2 : counting v gate every 2 pulses independent on other signals. one-shot avs fixed triggering fixed fixed de-triggering t b t b v ds t b v gate continued 2 pulses v gate continued another 2 pulses 1st valley switching t b t b 1st valley- 2nd valley frequency modulation. modulation frequency is approximately 17khz. v gate continued 2 pulses 1st or 2nd is depend on gatex2 synchronize synchronize fsq0765r rev. 00 t b triggering fixed fixed fixed
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 17 pcb layout guide due to the combined scheme, fps shows better noise immunity than conventional pwm controller and mosfet discrete solution. further more, internal drain current sense eliminates the possibility of noise generation caused by a sensing resistor. there are some recommendations for pcb layout to enhance noise immunity and suppress natural noise inevitable in power- handling components. there are typically two grounds in the conventional smps: power ground and signal ground. the power ground is the ground for primary input voltage and power, while the signal ground is ground for pwm controller. in fps, those two grounds share the same pin, gnd. normally the separate grounds do not share the same trace and meet only at one point, the gnd pin. more, wider patterns for both grounds are good for large currents by decreasing resistance. capacitors at the vcc and fb pins should be as close as possible to the corresponding pins to avoid noise from the switching device. sometimes mylar? or ceramic capacitors with electrolytic for v cc is better for smooth operation. the ground of these capacitors needs to connect to the signal ground (not power ground). the cathode of the snubber diode should be close to the drain pin to minimize stray inductance. the y-capacitor between primary and secondary should be directly connected to the power ground of dc link to maximize surge immunity. because the voltage range of feedback and sync line is small, it is affected by the noise of the drain pin. those traces should not draw across or close to the drain line. when the heat sink is connected to the ground, it should be connected to the power ground. if possible, avoid using jumper wires for power ground and drain. mylar? is a registered trademark of dupont teijin films. figure 37. recommended pcb layout
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 18 typical application circuit features ? average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input ? low standby mode power consumption (<1w at 230v ac input and 0.5w load) ? reduce emi noise through valley switching operation ? enhanced system reliability through various protection functions ? internal soft-start (17.5ms) key design notes ? the delay time for overload protection is designed to be about 23ms with c105 of 33nf. if faster/slower triggering of olp is required, c105 can be changed to a smaller/larger value (e.g. 100nf for 70ms). ? the input voltage of v sync must be between 4.7v and 8v just after mosfet turn-off to guarantee hybrid control and to avoid ovp triggering during normal operation. ? the smd-type 100nf capacitor must be placed as close as possible to v cc pin to avoid malfunction by abrupt pul- sating noises and to improve surge immunity. 1. schematic figure 38. demo circuit of fsq0565r application fps? device input voltage range rated output power output voltage (maximum current) lcd monitor power supply fsq0565r 85-265v ac 46w 5.1v (2.0a) 12v (3.0a) 3 4 c102 150nf 275vac lf101 34mh c101 150nf 275vac rt1 5d-9 f1 fuse 250v 2a c103 100 f 400v r103 33k ? 1w c104 4.7nf 630v d101 1n 4007 c105 33nf 100v 1 2 3 4 5 t1 eer3016 bd101 2kbp06m3n257 1 2 r101 2m ? 1w fsq0565r v str vfb vcc drain gnd 1 2 3 4 6 8 10 d201 mbrf10h100 c201 1000 f 25v c202 1000 f 25v l201 5 h 12v, 3a 6 7 d202 mbrf1060 c203 1000 f 10v c204 1000 f 10v l202 5 h 5v, 2a r201 1k ? r202 1.2k ? r204 4k ? r203 1.2k ? c205 47nf r205 4k ? c301 4.7nf 1kv ic301 fod817a ic201 ka431 r102 68k ? c107 47 f 50v d102 uf 4004 r107 18k ? c106 100nf smd r108 12k ? sync 5 r104 20 ? 0.5w r105 100 ? 0.5w zd101 1n4745a optional components fsq0765r rev.00
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 19 2. transformer figure 39. transformer schematic diagram of fsq0565r 3. winding specification 4. electrical characteristics 5. core & bobbin ? core: eer3016 (ae=109.7mm 2 ) ? bobbin: eer3016 position no pin (s f) wire turns winding method top insulation: polyester tape t = 0.025mm, 4 layers n p /2 2 1 0.4 1 20 2-layer solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n 12v /2 9 8 0.5 2(tiw) 4 center solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n a 4 50.15 1 10 center solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n 5v 7 6 0.5 2(tiw) 4 center solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n 12v /2 10 9 0.5 2(tiw) 5 center solenoid winding insulation: polyester tape t = 0.025mm, 2 layers bottom n p /2 3 2 0.4 1 32 2-layer solenoid winding pin specification remarks inductance 1 - 3 360h 10% 100khz, 1v leakage 1 - 3 15h maximum short all other pins eer3016 n p /2 n 12v /2 n a 1 2 3 4 5 6 7 8 9 10 n p /2 n 5v n 12v /2 fsq0765r rev.00 10 lp/2 (0.4 ) tape 1t 3 2 2 bottom of bobbin 10 9 9 tape 2t tape 2t l12v/2 (tiw 0.5 , 2parallel) 7 7 6 6 l5v (tiw 0.5 , 2parallel) tape 2t 4 5 tape 2t 9 9 8 8 l12v/2 (tiw 0.5 , 2parallel) tape 2t tape 1t 1 lp/2 (0.4 ) lvcc (0.2 ) tape 4t fsq0765r rev.00
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 20 6. demo board part list part value note part value note resistor c205 47nf/50v ceramic capacitor r101 2m 1w c301 4.7nf/1kv ceramic capacitor r102 68k 1/2w inductor r103 33k 1w l201 5h 5a rating r104 20 1w l202 5h 5a rating r105 100 optional , 1/4w diode r107 18k 1/4w d101 in4007 1a, 1000v general-purpose rectifier r108 12k 1/4w d102 uf4004 1a, 400v ultrafast rectifier r201 1k 1/4w zd101 1n4745a 1w 16v zener diode (optional) r202 1.2k 1/4w d201 mbrf10h100 10a,100v schottky rectifier r203 1.2k 1/4w d202 mbrf1060 10a,60v schottky rectifier r204 5.2k 1/4w ic r205 4.7k 1/4w ic101 fsq0565r fps? capacitor ic201 ka431 (tl431) voltage reference c101 150nf/275v ac box capacitor ic202 fod817a opto-coupler c102 150nf/275v ac box capacitor fuse c103 100f/400v electrolytic capacitor fuse 2a/250v c104 4.7nf/630v film capacitor ntc c105 33nf/50v ceramic capacitor rt101 5d-9 c106 100nf/50v smd (1206) bridge diode c107 47f/50v electrolytic capacit or bd101 2kbp06m2n257 bridge diode c201 1000f/25v low esr electrolytic capacitor line filter c202 1000f/25v low esr electrolytic capacitor lf101 34mh c203 1000f/10v low esr electrolytic capacitor transformer c204 1000f/10v low esr electrolytic capacitor t1 eer3016 ae=109.7mm 2
fsq0565r, fsq0765r ? green-mode farichild po wer switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 21 package dimensions to-220f-6l (forming) figure 40. 6-lead, to-220 package mkt-to220a06revb
fsq0565r, fsq0765r ? green-mode farichild powe r switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565r, fsq0765r rev. 1.0.1 22


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